The present disclosure relates to a solid-state imaging element formed by laminating a sensor substrate and a circuit substrate to each other in such a manner as to join the electrodes of the sensor substrate and the circuit substrate to each other, a method for manufacturing the solid-state imaging element, and an electronic device using the solid-state imaging element.
A three-dimensional structure in which a photoelectric conversion section and a peripheral circuit section are laminated to each other is proposed as one of structures for achieving further miniaturization of elements and higher density of pixels in a solid-state imaging element included in an electronic device such as a portable telephone, a digital camera, a camcorder, or the like.
In manufacturing a solid-state imaging element of such a three-dimensional structure, for example a sensor substrate in which a CIS (complementary metal oxide semiconductor image sensor) having a photoelectric conversion section is formed and a circuit substrate in which a peripheral circuit section is formed are laminated to each other. The lamination of these substrates is performed by arranging electrodes (bonding pads) drawn out to surfaces on one side of each of the substrates such that the electrodes (bonding pads) are opposed to each other, and performing heat treatment in this state. In order to facilitate the joining of the bonding pads to each other by the heat treatment, an insulating film surrounding bonding pads is recessed in advance (see Japanese Patent Laid-Open No. 2006-191081, for example, for the above description).
In addition, a constitution in which the sensor substrate and the circuit substrate are laminated to each other so as to cancel the internal stress of both of the substrates is proposed in order to prevent a distortion or a warp in the sensor substrate and the circuit substrate laminated as described above (see Japanese Patent Laid-Open No. 2007-234725, for example, for the above description).